Low-power, high-speed sense amplifier

Static information storage and retrieval – Read/write circuit – Differential sensing

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36518911, 365207, 327 51, G11C 700

Patent

active

054368669

ABSTRACT:
A low-power, high-speed sense amplifier for a memory device with at least one memory cell, comprising a voltage shifter for inputting voltages from data bus and data bus bar lines connected respectively to bit and bit bar lines connected to the memory cell and, in response to a sense amplifier enable signal, decreasing the inputted voltages and shifting the decreased voltages, a current sense amplification circuit responsive to the sense amplifier enable signal for sensing current of an output voltage from the voltage shifter to increase a gain thereof, and a voltage sense amplification circuit for sensing a difference between the output voltage from the voltage shifter and an output voltage from the current sense amplification circuit.

REFERENCES:
patent: 4618785 (1986-10-01), Van Tran
patent: 4636664 (1987-01-01), Craycraft et al.
patent: 4984204 (1991-01-01), Sato et al.
patent: 5301158 (1994-04-01), Yokomizo
patent: 5371703 (1994-12-01), Miyamoto
patent: 5377143 (1994-12-01), McClure

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