Low power, high speed random access memory circuit

Details Low power, high speed random access memory circuit Low power, high speed random access memory circuit

1983-05-09

1986-03-11

Hecker, Stuart N.

Static information storage and retrieval

Systems using particular element

Flip-flop

365190, 365175, G11C 700, G11C 1134

Patent

active

045758212

ABSTRACT:
A random access memory circuit for use with positive and negative supply voltages, a read enable line, an output line, and write "1" and "0" lines includes first, second, third, and fourth level shifting diodes. A first input isolation diode is connected between the write "1" line and the first level shifting diode. A second input isolation diode is connected between the write "0" line and the cathode of the third level shifting diode. The drain of a first write FET is connected to the anode of the third diode, the source is connected to the read enable line, and the gate is connected to the cathode of the second level shifting diode. A second write FET has its drain connected to the anode of the first level shifting diode, its source connected to the read enable line, and its gate connected to the cathode of the fourth diode. An output buffer FET is connected by its source to the read enable line, by its gate to the cathode of the fourth diode. An output isolation diode is connected between the drain of the output buffer FET and the output line.

REFERENCES:
patent: 3603820 (1971-09-01), Schuenemann
patent: 3686645 (1972-08-01), Brojdo
patent: 3849675 (1974-11-01), Waaben
patent: 3863229 (1975-01-01), Gersbach
patent: 3990056 (1976-11-01), Luisi et al.
patent: 4091461 (1978-05-01), Booher
patent: 4096584 (1978-06-01), Owen, III et al.
patent: 4110840 (1978-08-01), Abe et al.
patent: 4122540 (1978-10-01), Russell et al.
patent: 4123799 (1978-10-01), Peterson
patent: 4133611 (1979-01-01), Baker
patent: 4233674 (1980-11-01), Russel et al.
patent: 4287575 (1981-09-01), Eardley et al.
patent: 4300064 (1981-11-01), Eden
patent: 4322824 (1982-03-01), Allan
patent: 4355377 (1982-10-01), Sud et al.
Kaelin et al, "An Ultra Low Power, Fast GaAs RAM for Space Applications", First Annual Phoenix Conference on Computers and Communications, May 9-12, 1982, pp. 414-416.

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