Low power dynamic inverter logic gate with inverter-like output

Details Low power dynamic inverter logic gate with inverter-like output Low power dynamic inverter logic gate with inverter-like output

2006-03-07

2006-03-07

Cho, James H. (Department: 2819)

Electronic digital logic circuitry

Clocking or synchronizing of logic stages or gates

Field-effect transistor

C326S119000

Reexamination Certificate

active

07009427

ABSTRACT:
A low power dynamic circuit with an inverter-like output is disclosed. The dynamic circuit includes a precharge circuit, a discharge circuit, and an output circuit. The precharge circuit charges a precharge node from the clock signal when the data input signal is low and the clock input is high. The discharge circuit discharges a discharge node to the clock signal when the data input signal is high and the clock input is low. The output circuit is an inverter-like configuration that uses the precharge node to generate a logic high and the discharge node to generate a logic low, as required by the data input signal. In one embodiment, the precharge circuit is operative with a first clock and the discharge circuit is operative with a second clock. In yet another embodiment, there is only a precharge circuit and an output circuit.

REFERENCES:
patent: 4017741 (1977-04-01), Briggs
patent: 5473270 (1995-12-01), Denker
patent: 5743270 (1998-04-01), Gazzara et al.
patent: 6150848 (2000-11-01), Fouts et al.
patent: 6242952 (2001-06-01), Bosshart et al.
patent: 407249982 (1995-09-01), None

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