Error detection/correction and fault detection/recovery – Pulse or data error handling – Error count or rate
Reexamination Certificate
1999-04-06
2004-10-05
Lamarre, Guy J. (Department: 2133)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Error count or rate
C370S311000
Reexamination Certificate
active
06802033
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention generally relates to communications systems, and more particularly to an apparatus and method for controlling power consumption in electronic device that transmits voice, data, and/or other information in either analog or digital form.
2. Background Description
For integrated circuits (IC) formed in insulated gate complementary field effect transistor (FET) processes, typically referred to as CMOS, power is directly proportional to load capacitance, circuit operating frequency, and the square of the circuit supply voltage. Conventional approaches for reducing power in CMOS IC devices include reducing the circuit operating voltage, using low power circuits such as clock gating circuits, and holding unused logic at a fixed voltage level.
Further, since power is directly proportional to operating frequency, the operating frequency of a circuit is constrained by its intended use. The operating conditions can range from high power data communication networks to low power battery operated cellular phones. Circuits in a battery operated environment, for example, are usually constrained to operate at low power, so that a minimum required battery life will be achieved. However, predicted battery lifetime is based upon average expected use and operating conditions. Further, cellular phones may operate under varied conditions, using various power sources, ranging from a house current AC connection to a battery.
Conventional communications controllers such as those used in cellular phones or other wireless systems are designed for a minimum maintainable transmission bandwidth under worst case conditions, i.e. battery operation. Conventionally, the operating frequency of the controller dictates the error correction and detection algorithms that are necessary. The error rate the controller is intended to tolerate dictates the complexity of the algorithm of the controller, i.e., the higher the error rate, the more complex the algorithm.
The complexity of the algorithm determines the logic necessary for its implementation and, correspondingly, power consumption in the error correction circuitry. For example, a collection of exclusive OR (XOR) gates may be used to generate parity and parity errors may be detected with another group of XOR gates. More rigorous error correction may be realized by resorting to more extensive error checking and correction (ECC) algorithms, which are vastly more complicated and are well known in the art. For an example of ECC, see U.S. Pat. No. 5,434,868 entitled “Fault Tolerant Memory” to Aichelmann, Jr. et al., which is assigned to the assignee of the present invention and incorporated herein by reference.
From the foregoing discussion, it is clear that there is a trade-off among data throughput, power, and error recovery that a communications controller must make. Conventional controllers address this problem by using fixed, single operating point designs, i.e., conventional controllers either use complex, high-speed error correcting algorithms which consume large amounts of power or simpler, slower algorithms which consume much less power.
Neither design is optimum from an efficiency standpoint. For example, at times when power is not critical and/or error rate is low, controllers using complex error correcting algorithms unnecessarily consume power, which substantially shortens battery life. On the other hand, when error rates are high and power is critical, controllers using simple error correcting algorithms are under-powered and thus are unable to sustain an acceptable error rate.
A need therefore exists for a communications controller which can vary its power consumption requirements based on the operating conditions of the device in which it is incorporated, thereby striking an optimum balance between acceptable error rate and power consumption at all times during operation of the device.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a communications controller which operates in a more efficient manner compared with existing communications controllers.
It is an object of the present invention to accomplish the aforementioned object by providing a communications controller which automatically varies power consumption based on the operating conditions of a device in which it is incorporated, thereby maximizing battery life if the device is battery powered.
It is another object of the present invention to provide a communications controller which varies power consumption by selecting one of a plurality of error correcting algorithms which differ in complexity and thus consume different amounts of power, the selection being made based on an error rate measurement which is continuously updated throughout operation of the device.
It is another object of the invention to vary the power consumption in the above-prescribed manner while maintaining at all times at least a predetermined minimum error rate (e.g., effective signal-to-noise ratio).
It is another object of the present invention to provide a method for controlling the power consumption of an electronic device by automatically selecting an error correction algorithm which is best suited to the operating conditions of the device.
It is another object of the present invention to permit a user to manually control the power consumption of an electronic device incorporating the communications controller of the present invention, specifically by providing a button or dial on the device which, when pushed, automatically causes a different error correcting algorithm to be selected to thereby either improve signal-to-noise ratio at the expense of battery life or save battery life at the expense of a reduced signal-to-noise ratio.
These and other objects of the invention are achieved by providing a communications controller which dynamically selects between at least two error detection and correction circuits in order to maintain an error rate at or below an acceptable error rate. When operating conditions are good (e.g., clear weather, minimum structural interference, etc.)and relatively few errors are detected, a simple, low-power error detection/correction circuit is selected. The low-power error correction circuit operates at a frequency lower than more complex, higher power error correction circuits, but advantageously at substantially the same data error rate, thus saving battery life. When conditions are degraded and/or frequent errors are detected, a more complex, higher-power error correction circuit is selected to maintain the minimum acceptable error rate. Thus, at all times, the invention ensures that a desired minimum acceptable error rate is maintained while simultaneously reducing power consumption requirements during periods where operating conditions are good and few errors are detected.
To further reduce power consumption, the communications controller adjusts one or more controller parameters (e.g., operating frequency, supply voltage, etc.) based on the error detection circuit that is currently selected. In addition, further power savings can be achieved by adjusting the signal strength (power) of a transmitter of the device to the minimum required by current operating conditions.
Alternate embodiments of the invention include mode selection that is manual or in response to control information encoded in transmitted data. Manual error checking/correction mode selection may be done externally, i.e. by a person using a control dial on a cellular telephone when voice data gets too noisy, or internally by a selector comparing critical error level to the actual detected data error rate. Encoded error checking/correction mode selection may be done by including a critical error threshold value in transmitted data for facsimile or e-mail data transmissions.
REFERENCES:
patent: 4261054 (1981-04-01), Scharla-Nielsen
patent: 4777653 (1988-10-01), Bonnerot et al.
patent: 4955038 (1990-09-01), Lee et al.
patent: 5155590 (1992-10-01), Beyers, II et al.
patent: 5293639 (1994-03-01), Wilson et al.
paten
Bertin Claude L.
Dean Alvar A.
Goodnow Kenneth J.
Gould Scott W.
Perry Patrick E.
Henkler Richard A.
International Business Machines - Corporation
Lamarre Guy J.
Whitham Curtis & Christofferson, P.C.
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