Low-power consumption bi-CMOS circuit formed by a small number o

Details Low-power consumption bi-CMOS circuit formed by a small number o Low-power consumption bi-CMOS circuit formed by a small number o

1994-05-16

1995-12-26

Westin, Edward P.

Electronic digital logic circuitry

Function of and, or, nand, nor, or not

Bipolar and fet

326 26, 326 84, H03K 1920

Patent

active

054790050

ABSTRACT:
A bi-CMOS circuit has an emitter-coupled logic circuit responsive to an input signal for producing a logic signal and the complementary logic signal, an emitter follower responsive to the logic signal for changing the voltage level at the emitter node thereof and a switching circuit coupled between the emitter follower and a negative power voltage line and responsive to the complementary logic signal for selectively coupling the emitter node and the negative power voltage line with an output node of the bi-CMOS circuit so that through-current does not flow through the switching circuit.

REFERENCES:
patent: 4868421 (1989-09-01), Herndon et al.
patent: 4937480 (1990-06-01), Higuchi et al.
patent: 4992681 (1991-02-01), Urakawa et al.
patent: 5075579 (1991-12-01), Ueno
patent: 5124581 (1992-06-01), Umeki
patent: 5331225 (1994-07-01), Matsui et al.
By S. Embabi et al., "Analysis and Optimization of BiCMOS Digital Circuit Structures", IEEE Journal of Solid-State Circuits, Apr. 1991, vol. 26, No. 4, pp. 676-679.

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