Low power clocking systems and methods

Electrical computers and digital processing systems: support – Computer power control – Power conservation

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C713S501000

Reexamination Certificate

active

07139921

ABSTRACT:
A low power reconfigurable processor core includes one or more processing units, each unit having a clock input that controls the performance of the unit; and a controller having a plurality of clock outputs each coupled to a respective clock input of one of the processing units, the controller varying the clock frequency of each processing unit to optimize power consumption and processing power for a task.

REFERENCES:
patent: 4021784 (1977-05-01), Kimlinger
patent: 5117442 (1992-05-01), Hall
patent: 5381157 (1995-01-01), Shiga
patent: 5502819 (1996-03-01), Aldrich et al.
patent: 5592658 (1997-01-01), Noam
patent: 5724591 (1998-03-01), Hara et al.
patent: 5734878 (1998-03-01), Hongo
patent: 5774703 (1998-06-01), Weiss et al.
patent: 5778218 (1998-07-01), Gulick
patent: 5790817 (1998-08-01), Asghar et al.
patent: 5790877 (1998-08-01), Nishiyama et al.
patent: 5799005 (1998-08-01), Soliman
patent: 5910930 (1999-06-01), Dieffenderfer et al.
patent: 5914961 (1999-06-01), Harris et al.
patent: 5925133 (1999-07-01), Buxton et al.
patent: 5960331 (1999-09-01), Weir et al.
patent: 5996083 (1999-11-01), Gupta et al.
patent: 6047214 (2000-04-01), Muller et al.
patent: 6047248 (2000-04-01), Georgiou et al.
patent: 6052036 (2000-04-01), Enstrom et al.
patent: 6088807 (2000-07-01), Maher et al.
patent: 6122686 (2000-09-01), Barthel et al.
patent: 6125451 (2000-09-01), Fukunaga
patent: 6141762 (2000-10-01), Nicol et al.
patent: 6188381 (2001-02-01), van der Wal et al.
patent: 6216234 (2001-04-01), Sager et al.
patent: 6236278 (2001-05-01), Olgarrd
patent: 6242953 (2001-06-01), Thomas
patent: 6300881 (2001-10-01), Yee et al.
patent: 6317840 (2001-11-01), Dean et al.
patent: 6415152 (2002-07-01), Chung
patent: 6542754 (2003-04-01), Sayers et al.
patent: 6560712 (2003-05-01), Arends et al.
patent: 6563448 (2003-05-01), Fontaine
patent: 6578155 (2003-06-01), Faucher et al.
patent: 6625036 (2003-09-01), Horio
patent: 6636976 (2003-10-01), Grochowski et al.
patent: 6647502 (2003-11-01), Ohmori
patent: 6711691 (2004-03-01), Howard et al.
patent: 6807235 (2004-10-01), Yano et al.
patent: 6829017 (2004-12-01), Phillips
patent: 6898721 (2005-05-01), Schmidt
patent: 6993669 (2006-01-01), Sherburne, Jr.
patent: 2001/0014585 (2001-08-01), Nakatsugawa
patent: 2002/0147932 (2002-10-01), Brock et al.
patent: 2002/0169990 (2002-11-01), Sherburne, Jr.
patent: 2002/0175839 (2002-11-01), Frey
patent: 2002/0184546 (2002-12-01), Sherburne, Jr.
patent: 2003/0028844 (2003-02-01), Coombs
patent: 2004/0243866 (2004-12-01), Sherburne, Jr.
patent: 2005/0117633 (2005-06-01), Schmidt
Intel, Migrating From Intel SA-100 to Intel 80200 Processor based on XScale™ Microarchitecture. Application Note, Sep. 2000. http://www.intel.com/design/iio/applnots/27340901.pdf.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Low power clocking systems and methods does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Low power clocking systems and methods, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Low power clocking systems and methods will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3622393

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.