Low power circuit for waking from a sleep mode by using a...

Details Low power circuit for waking from a sleep mode by using a... Low power circuit for waking from a sleep mode by using a...

1999-10-22

2003-04-22

Lee, Thomas (Department: 2185)

Electrical computers and digital processing systems: support

Computer power control

C713S310000, C323S318000

Reexamination Certificate

active

06553499

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to an electronic circuit.
BACKGROUND INFORMATION
Electronic circuits having a computer with an interface for the exchange of serial data are already known. Switches are provided via which the computer can be optionally connected to a voltage connection. No provisions are made for activating the switch by signals at the interface terminal.
In addition, computers are known that have a serial interface and that can be placed into a so-called sleep mode. In sleep mode, parts of the computer are no longer supplied with voltage resulting in a lower power consumption by the computer in this operating state. The computer can be switched from the sleep mode into an active state again by signals via the serial interface. However, it is necessary for at least parts of the computer to remain activated in order to process the signals present at the interface terminal. Such computers must therefore also be supplied with a non-negligible quiescent current even in sleep mode.
SUMMARY OF THE INVENTION
In contrast, the advantage of the electronic circuit according to the present invention is that the computer can be activated by a signal at the interface terminal and the power consumption in the inactivated state is particularly low at the same time. In the inactivated state, a current demand of less than 300 &mgr;A can be attained in this manner.
The second switch causes the computer to be connected by a single signal at the interface terminal to the voltage connection and to remain connected thereafter. The design of the first switch as a pnp transistor makes it possible for the switch to be used with serial data cables which have a high level in the sleep mode. The design of the first switch as an npn transistor makes it possible for the device to be used with serial data cables which have a LOW level in the sleep mode. Since the gate terminal of the second switch can be connected to ground potential by the computer, the power supply for the computer can again be terminated by the computer. A Zener diode can be used for decoupling the first switch and the second switch from voltage. The gate terminal of the first switch and the interface terminal can also be separated from each other by a diode, with the result that after the first switch is closed, the potentials at the interface terminal no longer have an effect on the gate terminal of the first switch. An interface can be provided in the computer for data interchange.


REFERENCES:
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