Electronic digital logic circuitry – Interface – Logic level shifting
Patent
1993-03-11
1994-12-06
Westin, Edward P.
Electronic digital logic circuitry
Interface
Logic level shifting
326109, H03K 190175, H03K 1901
Patent
active
053714210
ABSTRACT:
A BiMOS amplifier device includes one stage which can function as both a level-shift and buffer stage and an amplifier stage. The amplifier includes first and second bipolar transistors having their bases connected to first and second input terminals, respectively, having their collectors connected to a point of first potential, and having their emitters connected to the sources of first and second MOS transistors, respectively. The drains of the first and second MOS transistors are connected through respective impedance means to a point of second potential. The gate of each of the MOS transistors is connected to the drain of the other MOS transistor. An output terminal is connected to the drain of at least one of the MOS transistors.
REFERENCES:
patent: 4724343 (1988-02-01), Le Roux et al.
patent: 4845381 (1989-07-01), Cuevas
patent: 4864159 (1989-09-01), Cornelissen
patent: 4978870 (1990-12-01), Chen et al.
patent: 5075580 (1991-12-01), Dayton et al.
patent: 5075581 (1991-12-01), Kamata
patent: 5134319 (1992-07-01), Yamaguchi
The Journal of the Institute of Electronics and Communication Engineers of Japan, vol. J74-C-II, No. 6, Jun. 1991, pp. 532-540, "64K.times.1 BiMOS ECL RAM with Cross Coupled Level Conversion Circuit".
Kondoh Harufusa
Ohba Atsushi
Driscoll Benjamin D.
Mitsubishi Denki & Kabushiki Kaisha
Morrison Thomas R.
Ruschmann Herbert F.
Westin Edward P.
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