Electrical computers and digital processing systems: memory – Storage accessing and control – Memory configuring
Reexamination Certificate
2011-03-15
2011-03-15
Kim, Matt (Department: 2186)
Electrical computers and digital processing systems: memory
Storage accessing and control
Memory configuring
C711S202000, C711SE12002
Reexamination Certificate
active
07908455
ABSTRACT:
A block of contiguous data storage locations of a memory is divided into pools of memory chunks. The memory chunks in same ones of the pools have equal chunk sizes. The memory chunks in different ones of the pools have different chunk sizes. In each of the pools, the memory chunks are addressable by respective chunk base physical addresses in a respective linear contiguous sequence that starts from a respective pool base physical address. The physical addresses of the memory chunks are translated into corresponding internal handles and vice versa, where each of the internal handles is smaller in size than its corresponding physical address. For each of the pools, an associated pool queue comprising respective ones of the internal handles to allocatable ones of the memory chunks in the pool is maintained.
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Kim Matt
King & Spalding L.L.P.
Microchip Technology Incorporated
Verderamo, III Ralph A
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