Low overhead memory designs for IC terminals

Details Low overhead memory designs for IC terminals Low overhead memory designs for IC terminals

1996-03-26

1997-08-12

Hudspeth, David R.

Electronic digital logic circuitry

Interface

Current driving

326 38, 326 86, 326 16, H03K 190175, H03K 19173

Patent

active

056569530

ABSTRACT:
An integrated circuit includes a terminal which is accessible externally of the integrated circuit, and circuitry (LOB) coupled to said terminal and operable to latch at said terminal a signal applied to said terminal by a source (ICT) external to said integrated circuit.

REFERENCES:
patent: 3739193 (1973-06-01), Pryor
patent: 5134314 (1992-07-01), Wehrmacher
patent: 5469473 (1995-11-01), McClear et al.
patent: 5526310 (1996-06-01), Dondale
David George, "Use a Reprogrammable Approach to Boundary Scan for FPGAs", EDN Electrical Design News, vol. 38, No. 16, 5 Aug. 1993, pp. 97-100.

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