Low on resistance CMOS “wave” transistor for...

Details Low on resistance CMOS “wave” transistor for... Low on resistance CMOS “wave” transistor for...

2009-04-08

2011-12-20

Parker, Kenneth (Department: 2891)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S401000, C257SE29264

Reexamination Certificate

active

08080847

ABSTRACT:
In one embodiment of the present invention an array of power transistors on a semiconductor chip has repeating patterns of two “wave” gates which have alternating longer and shorter horizontal sections which are offset mirror images of each other together with a third straight horizontal section. Alternating source and drain regions lie between adjacent gates. Contacts are located adjacent each side of sections of the “wave” gates which connect the ends of the horizontal sections of the “wave” gates.

REFERENCES:
patent: 4462041 (1984-07-01), Glenn
patent: 4599789 (1986-07-01), Gasner
patent: 5488236 (1996-01-01), Baliga
patent: 5742087 (1998-04-01), Lidow
patent: 6060406 (2000-05-01), Alers et al.
patent: 2006/0023505 (2006-02-01), Iizuka
patent: 2004 349331 (2004-12-01), None
Fujishima, Naoto et al. “A High-Density Low On-Resistance Trench Lateral Power MOSFET With a Trench Bottom Source Contact”, IEEE Transactions on Electron Devices, vol. 49, No. 8, Aug. 2002, pp. 1462-1468.

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