Low-noise sigma-delta frequency synthesizer

Pulse or digital communications – Synchronizers – Phase displacement – slip or jitter correction

Reexamination Certificate

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Details

C375S376000, C327S147000, C327S156000

Reexamination Certificate

active

07315601

ABSTRACT:
A sample-and-hold (SAH) phase detector (PD) is clocked in such a way (using a reverse clocking mode) so as to avoid quantization noise increases due to folding that is generally associated with conventional charge pump based phase detectors. The PD is clocked with a clean clock (reference clock), rather than a divided clock. The SAH PD architecture additionally includes an integrated filtering function.

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