Pulse or digital communications – Synchronizers – Phase displacement – slip or jitter correction
Reexamination Certificate
2003-03-13
2008-01-01
Ghayour, Mohammed (Department: 2611)
Pulse or digital communications
Synchronizers
Phase displacement, slip or jitter correction
C375S376000, C327S147000, C327S156000
Reexamination Certificate
active
07315601
ABSTRACT:
A sample-and-hold (SAH) phase detector (PD) is clocked in such a way (using a reverse clocking mode) so as to avoid quantization noise increases due to folding that is generally associated with conventional charge pump based phase detectors. The PD is clocked with a clean clock (reference clock), rather than a divided clock. The SAH PD architecture additionally includes an integrated filtering function.
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Bakkaloglu Bertan
Bellaouar Abdellatif
Fontaine Paul H.
Brady W. James
Panwalkar Vineeta
Telecky , Jr. Frederick J.
Texas Instruments Incorporated
Wu Dolly Y.
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