Low load host/PCI bus bridge

Patent

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Details

395306, G06F 1300

Patent

active

057403856

ABSTRACT:
A bridge for coupling a host bus to a peripheral component interconnect (PCI) bus. A controller is used to transfer an address from the host bus while a datapath is used to transfer data from the host bus. The address and data is then transferred to the PCI bus over a set of signal lines coupled to the PCI bus such that each signal line transfers at least a portion of the address as well as at least a portion of data.

REFERENCES:
patent: 5448704 (1995-09-01), Spaniol et al.
patent: 5560022 (1996-09-01), Dunstan et al.
patent: 5564026 (1996-10-01), Amini et al.
patent: 5564060 (1996-10-01), Mahalingaiah et al.
patent: 5613075 (1997-03-01), Wade et al.
patent: 5617557 (1997-04-01), Stevens

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