Electronic digital logic circuitry – Tri-state – With field-effect transistor
Patent
1998-03-31
2000-08-22
Tokar, Michael
Electronic digital logic circuitry
Tri-state
With field-effect transistor
326 27, 326 83, H03K 1900, H03K 1902, H03K 190175, H03K 19094
Patent
active
061078298
ABSTRACT:
In accordance with the present invention there is provided a tristatable digital MOS output buffer/driver having a significantly reduced subthreshold leakage current. The buffer of the present invention comprises three P-channel transistor devices and three N-channel transistor devices. A reduced subthreshold leakage current is achieved by having the source of the output N-channel transistor device and the output P-channel transistor device connected to nodes having a variable voltage. This adjusts the source-to-body voltages of the output N-channel and P-channel transistor devices to be equal in magnitude to the voltage of the positive supply, resulting in the reduction of subthreshold leakage currents.
REFERENCES:
patent: 5381062 (1995-01-01), Morris
patent: 5418476 (1995-05-01), Strauss
patent: 5541528 (1996-07-01), Montoye et al.
patent: 5587671 (1996-12-01), Zagar et al.
patent: 5850153 (1998-12-01), Harris et al.
patent: 5889420 (1999-03-01), Poechmueller
Chang Daniel D.
Lucent Technologies - Inc.
Tokar Michael
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