Low leakage high performance static random access memory...

Details Low leakage high performance static random access memory... Low leakage high performance static random access memory...

2011-06-14

2011-06-14

Hoang, Huan (Department: 2827)

Static information storage and retrieval

Systems using particular element

Flip-flop

C365S156000, C365S189160, C365S189150, C365S188000, C365S202000, C365S233160, C365S233170

Reexamination Certificate

active

07961499

ABSTRACT:
A memory cell includes a storage element, a write circuit coupled to the storage element and a read circuit coupled to the storage element. At least a portion of the storage element and at least a portion of the write circuit are fabricated using a thicker functional gate oxide and at least a portion of the read circuit is fabricated using a thinner functional gate oxide.

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Suzuki T et al: “A Stable 2-Port SRAM Cell Design Against Simultaneously Read/Write-Disturbed Accesses” IEEE Journal of Solid-State Circuits, IEEE Service Center, Piscataway, NJ, US, vol. 43, No. 9, Sep. 1, 2008, pp. 2109-2119, XPO11234620, ISSN: 0018-9200, figures 4(c),5(b),14(b),16(c).
Verma N et al: “A 256 kb 65nm 8T subthreshold SRAM employing sense-amplifier redundancy” IEEE Journal of Solid-State Circuits IEEE USA, vol. 43, No. 1, Jan. 1, 2008, pp. 141-149, XP002574376 ISSN: 0018-9200, figure 5.
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