Low leakage and data retention circuitry

Details Low leakage and data retention circuitry Low leakage and data retention circuitry

2007-11-30

2008-10-28

Le, Don P (Department: 2819)

Electronic digital logic circuitry

Multifunctional or programmable

Having details of setting or programming of interconnections...

C326S046000, C326S081000

Reexamination Certificate

active

07443197

ABSTRACT:
An integrated circuit includes first circuitry and sleep transistor circuitry. The first circuitry receives input signals and processes the input signals. The first circuitry also retains data in a sleep state that has low leakage. The sleep transistor circuitry is coupled to the first circuitry and receives a sleep signal. The sleep circuitry reduces power consumption of the first circuitry in the sleep state to have low leakage based on the sleep signal while retaining the data in the first circuitry.

REFERENCES:
patent: 7295036 (2007-11-01), Zaveri et al.
patent: 2006/0242440 (2006-10-01), Frederick et al.
patent: 2007/0147159 (2007-06-01), Lee
patent: 2008/0088358 (2008-04-01), Caplan et al.

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