Low latency memories and systems using the same

Details Low latency memories and systems using the same Low latency memories and systems using the same

1998-01-30

1999-10-05

Hoang, Huan

Static information storage and retrieval

Systems using particular element

Capacitors

365203, 36523006, G11C 1124

Patent

active

059634685

ABSTRACT:
A memory 400 including a memory cell 501 disposed at the intersection of an addressable row and addressable column, memory cell 501 being accessible via a selected one of a pair of wordlines 503a, 503b associated with the row and a selected one of a pair of bitlines 502a, 502b associated with the column.

REFERENCES:
patent: 4896294 (1990-01-01), Shimizu et al.
patent: 5007022 (1991-04-01), Leigh
patent: 5010519 (1991-04-01), Yoshimoto et al.
patent: 5377142 (1994-12-01), Matsumura et al.
patent: 5781482 (1998-07-01), Sakata
"Transparent-Refresh DRAM (TreD) Using Dual-Port DRAM Cell" by Sakurai, Nogami, Sawada and Iizuka, 1998 IEEE Custom Integrated Circuits Conference pp. 4.3.1 through4.3.4.

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