Low k dielectric CVD film formation process with in-situ...

Active solid-state devices (e.g. – transistors – solid-state diode – With means to control surface effects – Insulating coating

Reexamination Certificate

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C257S760000, C257SE23164, C257SE23019

Reexamination Certificate

active

10906815

ABSTRACT:
A low k dielectric stack having an effective dielectric constant k, of about 3.0 or less, in which the mechanical properties of the stack are improved by introducing at least one nanolayer into the dielectric stack. The improvement in mechanical properties is achieved without significantly increasing the dielectric constant of the films within the stack and without the need of subjecting the inventive dielectric stack to any post treatment steps. Specifically, the present invention provides a low k dielectric stack that comprises at least one low k dielectric material and at least one nanolayer present within the at least one low k dielectric material.

REFERENCES:
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patent: 6518646 (2003-02-01), Hopper et al.
patent: 6703324 (2004-03-01), Wong
patent: 6713874 (2004-03-01), Hopper et al.
patent: 2001/0004550 (2001-06-01), Passemard
patent: 2002/0115285 (2002-08-01), Wong
patent: 2003/0234450 (2003-12-01), Grill et al.
patent: 2004/0137153 (2004-07-01), Thomas et al.
patent: 2004/0157436 (2004-08-01), Wong
patent: 2005/0179135 (2005-08-01), Kumar

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