Low jitter high speed CMOS to CML clock converter

Details Low jitter high speed CMOS to CML clock converter Low jitter high speed CMOS to CML clock converter

2006-05-02

2006-05-02

Tran, Anh Q. (Department: 2819)

Electronic digital logic circuitry

Function of and, or, nand, nor, or not

Bipolar transistor

C326S126000, C326S063000, C326S068000

Reexamination Certificate

active

07038495

ABSTRACT:
Provided is a circuit to convert input CMOS level signals having a predetermined duty cycle to CML level signals having a higher duty cycle. The circuit includes two differential transistor pairs connected together. The two differential pairs are constructed and arranged to use gates of the associated transistors as inputs to receive and combine a number of phase shifted CMOS input signals. The combined CMOS input signal are converted to CML level signals which are provided as circuit outputs.

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