Low-jitter high-frequency clock channel

Details Low-jitter high-frequency clock channel Low-jitter high-frequency clock channel

2009-09-08

2010-11-23

Le, Don P (Department: 2819)

Electronic digital logic circuitry

Signal sensitivity or transmission integrity

C326S093000, C333S012000

Reexamination Certificate

active

07839161

ABSTRACT:
According to one general aspect, an apparatus may include a clock channel, a shielding tunnel, and clock repeaters. In various embodiments, the clock channel may be configured to carry the clock signal, and may include a portion of a metal layer of an integrated circuit. In some embodiments, the shielding tunnel may be configured to shield, in at least four directions, the clock channel from other signals, and may include portions of a at least three metal layers of the integrated circuit. The shielding tunnel may be connected to the positive and negative supplies in order to provide the required power for the clock repeaters.

REFERENCES:
patent: 7173327 (2007-02-01), Siniaguine

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