Low-jitter charge-pump phase-locked loop

Pulse or digital communications – Synchronizers – Phase displacement – slip or jitter correction

Reexamination Certificate

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Details

C375S374000, C375S376000, C327S148000, C327S157000, C331S017000

Reexamination Certificate

active

10717778

ABSTRACT:
A phase-locked loop includes a voltage-controlled oscillator and a charge-pump loop filter. The voltage-controlled oscillator includes a varactor having a first set of capacitor cells configured to adjust a capacitance based on a first control voltage, and a second set of capacitor cells configured to adjust a capacitance based on a second control voltage. The charge-pump loop filter receives a first and a second update signal, each having at least one state based on a phase difference between a first clock and a second clock, and comprises a first component and a second component. The first component is configured to adjust, during an update period, a voltage across an impedance from a reference level based on the states of the first and second update signals and to return the voltage across the impedance to the reference level prior to an end of the update period, wherein the voltage across the impedance comprises the first control voltage. The second component is configured to adjust a voltage across a capacitor based on the states of the first and second input signals, wherein the voltage across the capacitor comprises the second control voltage.

REFERENCES:
patent: 4156855 (1979-05-01), Crowley
patent: 4857866 (1989-08-01), Tateishi
patent: 5767713 (1998-06-01), Williams
patent: 6016332 (2000-01-01), Smith et al.
patent: 6420917 (2002-07-01), Klemmer
patent: 6583675 (2003-06-01), Gomez
patent: 6614316 (2003-09-01), Masenas et al.
patent: 6952124 (2005-10-01), Pham
US 6,259,289, 07/2001, Klemmer (withdrawn)

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