Low-jitter adjustable level shifter with native devices and...

Details Low-jitter adjustable level shifter with native devices and... Low-jitter adjustable level shifter with native devices and...

2007-02-20

2007-02-20

Barnie, Rexford (Department: 2819)

Electronic digital logic circuitry

Interface

Supply voltage level shifting

C326S068000, C326S083000

Reexamination Certificate

active

11111352

ABSTRACT:
An adjustable level shifter with native and kicker transistors is provided. The level shifter provides high switching speeds, adjustable output voltage levels, and low jitter. The level shifter has first and second thick-oxide p-channel metal-oxide-semiconductor (PMOS) transistors, first and second thick-oxide native n-channel metal-oxide-semiconductor (NMOS) transistors, and first and second thin-oxide NMOS transistors. The first PMOS transistor, first native transistor, and first NMOS transistor are connected in series and the second PMOS transistor, second native transistor, and second NMOS transistor are connected in series. An input data signal and an inverted version of the input data signal drive the gates of the thin-oxide NMOS transistors. A node located between the first PMOS transistor and first native transistor is connected to an output data terminal. The kicker transistor is connected in parallel with the first PMOS transistor.

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patent: 6842043 (2005-01-01), Nguyen et al.
patent: 6864718 (2005-03-01), Yu

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