Low dielectric constant insulating films with laminated...

Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of... – Insulative material deposited upon semiconductive substrate

Reexamination Certificate

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C438S624000, C438S763000, C438S782000, C257S760000, C427S397700, C428S688000

Reexamination Certificate

active

06407011

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to methods of forming stacked insulating films and of fabricating semiconductor devices, and more particularly, to stacked insulating films, methods for forming thereof, semiconductor devices using such stacked insulating film as an interlayer insulating film, and methods for fabricating such semiconductor devices.
2. Description of the Related Art
As a degree of integration of recent semiconductor integrated circuits advances, there is an increasing need for using a low-k film (a dielectric film having a low dielectric constant) as an insulating film aiming at faster operation speed and lower electric consumption of LSIs. An approach using an organic insulating film as the low-k film, in place of a silicon oxide film which has been a former standard of the interlayer insulating film, was reported, for example, by Hasegawa et al. in the Proceedings of 1997 Dry Process Symposium. The organic insulating film reported in the literature employed an organic polymer containing no silicon as a component element.
In the general procedures, such organic insulating film is processed using a process mask made of a silicon oxide film. Fukazawa et al. reported in the Proceedings of 1998 Dry Process Symposium an exemplary process based on dry etching using oxygen or nitrogen gas plasma. The silicon oxide film used as a process mask remains unremoved and serves as a part of a material composing a finished semiconductor device. The silicon oxide film can generally be processed with a fluorine-containing gas which hardly etches the organic insulating film. This ensures a status of so-called high process selectivity, which has been desirable in terms of designing semiconductor fabrication processes.
The silicon oxide film is generally formed by the plasma CVD (chemical vapor deposition) process, since the process temperature has to be suppressed at 400° C. or below so as not to affect the wirings already formed. Typical conditions for the film formation employ monosilane (SiH
4
) with a flow rate of 100 sccm, nitrous oxide (N
2
O) with a flow rate of 2,000 sccm, and nitrogen (N
2
) with a flow rate of 1,000 sccm, all of which being introduced into a reaction chamber of a plasma CVD apparatus, and a microwave power of 350 W (2.45 GHz) and a substrate susceptor temperature of 400° C.
However, a problem resides in that the interlayer insulating film made of an organic material may be highly combustible. Such organic insulating film can easily be processed with an oxygen-base gas, whereas it is very likely to get oxidation damage. Even in a process using nitrogen gas, the organic insulating film to be processed may easily get damage due to degassing components released from the neighboring oxide films. Although this may not result in combusting-out of the organic insulating film as in a process known as ashing, an oxidative decomposition reaction may proceed within the film, and volatile hydrocarbons (or oxygen-containing hydrocarbons) may be emitted. It is on such organic insulating film that the silicon oxide is stacked.
In the process of forming the silicon oxide film for covering wirings in LSIs, the plasma CVD process, is generally employed considering limitations on the film forming temperature and on the productivity. The reactive gas used in the plasma CVD process for forming the silicon oxide film, however, contains an oxidizing agent. For example, nitrous oxide is typically used as the oxidizing agent when silane gas is used as a silicon source, and oxygen is generally used for the case with tetraethoxysilane (TEOS).
After the silicon oxide film is formed to a certain thickness on the organic insulating film, the silicon oxide film per se becomes resistive enough to prevent the surface of the organic insulating film from direct attack by the oxygen gas plasma. Some fear of oxidative combustion reaction on the surface of the organic insulating film, however, still remains in the early stage of the film formation. While various approaches have been made to suppress the oxidative combustion reaction in the early stage of the film formation through controlling conditions of applying a microwave or a timing of the gas supply, they are still on the way to thorough suppression.
FIG. 7A
shows an exemplary conventional aluminum wiring as combined with tungsten via plugs, in which a first wiring
111
is fabricated on a substrate
101
, a first organic insulating film
112
is formed so as to cover the first wiring
111
, and further thereon a first silicon oxide film
113
is formed. A first contact hole
114
is provided so as to penetrate the first silicon oxide film
113
and the first organic insulating film
112
and so as to reach the first wiring
111
, and the first contact hole
114
is filled with a first plug
115
made of tungsten.
On the first silicon oxide film
113
formed is a second wiring
116
, which is covered with a second organic insulating film
117
, and further thereon a second silicon oxide film
118
is formed. A second contact hole
119
is provided so as to penetrate the second silicon oxide film
118
and the second organic insulating film
117
and so as to reach the second wiring
116
, and the second contact hole
119
is filled with a second plug
120
made of tungsten.
FIG. 7B
shows an exemplary copper damascene wiring, in which a first organic insulating film
211
is formed on a substrate
201
, and further there on a first silicon oxide film
212
is formed. A first groove
213
is provided to the first silicon oxide film
212
and the first organic insulating film
211
, and a first wiring
214
is formed so as to fill the first groove
213
. On the first silicon oxide film
212
, formed are a second organic insulating film
215
covering a first wiring
214
; a second silicon oxide film
216
; a third organic insulating film
217
; and a third silicon oxide film
218
in this order.
A second groove
219
is provided to the third silicon oxide film
218
and the third organic insulating film
217
, and a second wiring
220
is formed so as to fill the second groove
219
. A first contact hole
221
is provided so as to penetrate the second silicon oxide film
216
and the second organic insulating film
215
, and a first plug
222
is formed so as to fill the first contact hole
221
and so as to interconnect the second wiring
220
and the first wiring
214
.
Further on the third silicon oxide film
218
, a fourth organic insulating film
223
and a fourth silicon oxide film
224
are stacked in this order so as to cover the second wiring
220
. A second contact hole
225
is provided so as to penetrate the fourth silicon oxide film
224
and the fourth organic insulating film
223
and so as to reach the second wiring
220
, and a second plug
226
is formed so as to fill the second contact hole
225
.
In both wiring configurations shown in
FIGS. 7A and 7B
, the individual organic insulating films may introduce damages in their interfacial area with the adjacent silicon oxide films when the silicon oxide films are directly formed on the organic insulating films .
Worse than all, even if the organic insulating films shown in the individual configurations in
FIGS. 7A and 7B
are made with, for example, polyaryl ether, which is expected to lower the overall dielectric constant of the insulating films due to its small dielectric constant of approx. 2.7, the effect of using such low-k film will partially be cancelled by using the silicon oxide films having a dielectric constant as high as 4.2. Hence, depending on the ratio of their film thicknesses, an effective dielectric constant of the stacked insulating film as contributed by the organic insulating films and the silicon oxide films will exceed 3.0. This may result in insufficient reduction in inter-wiring capacitance occurring between the neighboring wirings in the different layers or in the same layer, and thus may adversely affect performances of semiconductor devices such as signal transmission delay.
SUMMARY OF THE I

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