Low defect etching of patterns using plasma-stencil mask

Details Low defect etching of patterns using plasma-stencil mask Low defect etching of patterns using plasma-stencil mask

1985-06-28

1987-04-28

Powell, William A.

Adhesive bonding and miscellaneous chemical manufacture

Delaminating processes adapted for specified product

Delaminating in preparation for post processing recycling step

156646, 156655, 1566591, 156668, 156345, 20419232, 204298, B44C 122, B29C 3700, C03C 1500, C03C 2506

Patent

active

046612033

ABSTRACT:
Resist coating on the surface of a semiconductor wafer is removed by a one-step process using anisotropic reactive ion etching through an apertured stencil disposed close to but spaced from the resist-coated surface. The ion bombardment greatly enhances the plasma etch rate in the areas of the coating exposed through stencil apertures so that only the exposed areas are effectively etched during the limited exposure time in spite of the presence of chemically reactive gas between the stencil and other areas of the wafer surface. The technique is limited by low resolution but is ideally suited for clearing resist from atop fiducial marks used to align the wafer with multiple wafers in an integrated circuit chip.

REFERENCES:
patent: 4119688 (1978-10-01), Hiraoka
patent: 4158589 (1979-06-01), Keller et al.
patent: 4523971 (1985-06-01), Cumo et al.
Asch et al., Structuring a Photoresist Layer by Reactive Ion Etching, IBM Technical Disclosure Bulletin, vol. 26, No. 2, Jul. 1983, p. 685.

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