Low cost testing and sorting for integrated circuits

Details Low cost testing and sorting for integrated circuits Low cost testing and sorting for integrated circuits

2008-12-04

2011-11-15

Le, Vu (Department: 2824)

Static information storage and retrieval

Read/write circuit

Testing

C324S763010

Reexamination Certificate

active

08059478

ABSTRACT:
Methods of testing and sorting integrated circuits in clusters are disclosed. Each cluster has power and data terminals connected to common power and data busses providing a common power supply. Each integrated circuit has a first non-volatile memory storing an activation code and a second programmable non-volatile memory that is capable of storing the activation code. If an integrated circuit passes testing, the activation code stored in the first non-volatile memory is written into the second non-volatile memory. An integrated circuit is independently functional upon separation from the cluster if the codes in the first and second non-volatile memories match. Upon separation, integrated circuits are queried to determine which respond. Each integrated circuit includes logic adapted to determine whether the codes in the first and second non-volatile memories match. If the codes do not match, the logic permanently disables the integrated circuit upon separation from the cluster.

REFERENCES:
patent: 3813650 (1974-05-01), Hunter
patent: 5734819 (1998-03-01), Lewis
patent: 6380729 (2002-04-01), Smith
patent: 6952623 (2005-10-01), McAdams et al.
patent: 7299388 (2007-11-01), Ung et al.
patent: 7307528 (2007-12-01), Glidden et al.
patent: 7312622 (2007-12-01), Hyde et al.
patent: 2003/0221152 (2003-11-01), Volkerink et al.
patent: 2006/0086805 (2006-04-01), Oozeki et al.
patent: 2006/0125505 (2006-06-01), Glidden et al.
patent: 2006/0125506 (2006-06-01), Hara et al.
patent: 2006/0125507 (2006-06-01), Hyde et al.
patent: 2007/0011518 (2007-01-01), Ung et al.
patent: 2007/0218571 (2007-09-01), Stoughton et al.
patent: 2007/0241766 (2007-10-01), Kamitai et al.
patent: 2008/0088417 (2008-04-01), Smith et al.
patent: 8-23016 (1996-01-01), None
Noboru Mori, Masamitsu Shimazakiand Akira Okugaki; “Test of Semiconductor Memory”; esp@cenet; Abstract of Publication No. JP8023016A; Publication Date: Jan. 23, 1996; esp@cenet Database—Worldwide.

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