Low cost polysilicon active p-channel load

Details Low cost polysilicon active p-channel load Low cost polysilicon active p-channel load

1991-08-15

1993-05-18

Hille, Rolf

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257 66, 257903, H01L 2976, H01L 2904, H01L 2711

Patent

active

052123995

ABSTRACT:
A low cost active P-channel load for use in semiconductor devices is developed. The active P-channel load may be used in a variety of designs, such as functioning as a pullup device in integrated circuits and more specifically for use as a pullup resistor in SRAM devices. The P-channel load is built overlying an active NMOS device and not only takes up less die space but also allows for a simple process to construct the P-channel load. This P-channel device is easily incorporated into an SRAM process flow to build an SRAM cell made up of active NMOS devices that utilize the P-channel devices as pullups.

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IEEE Transaction on Electron Devices, vol. ED-29, No. 4, Apr. 1982, "Stacked Transistors CMOS (ST-MOS), an NMOS Technology Modified to CMOS" by Colinge et al., pp. 585-589.
IEEE Electron Device Letters, vol. EDL-4, No. 8, Aug. 1983, "Stacked CMOS SRAM Cell" by Chen et al., pp. 272-274.

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