Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
Reexamination Certificate
2000-12-21
2003-11-04
Sparks, Donald (Department: 2187)
Electrical computers and digital processing systems: memory
Storage accessing and control
Specific memory composition
C711S145000, C711S154000, C711S163000, C711S173000
Reexamination Certificate
active
06643731
ABSTRACT:
FIELD OF THE INVENTION
This invention relates to the field of electronic memory management, more particularly to methods and systems for managing nonvolatile semiconductor memory, more particularly to methods and systems for managing nonvolatile semiconductor memory in small devices that are susceptible to power interruptions.
BACKGROUND OF THE INVENTION
Hand-held electronic devices are becoming more and more complex. Thanks to faster processors and much lower-priced memory, modem personal digital assistants (PDAs), computers, and calculators have much more capability than similar systems even a few years ago. At the same time, prices have fallen rapidly. Because of the small size and low power and price requirements, most hand-held devices do not have hard disk drives, or large amounts of read only memory (ROM).
Without a hard disk drive, calculators and personal digital assistants must provide non-volatile storage in which to store user data and application software. Some devices have turned to FLASH memory to answer the need for non-volatile memory. Flash memory shares some of the attributes of both random access memory RAM, which can be written to and read from many times, and ROM, which can be read from many times but only written to once. Flash memory can be written to and read from many times, but once a logic low, herein referred to as a “zero,” is written to a location, the location will remain a zero until the location is erased. In other words, a location becomes a logic high, or “one,” when it is erased and stays a one until a zero is written to it. Once a zero is written into the location a one written to the location will have no effect—it cannot become a one again until the location is erased. Further complicating matters is the requirement that an erase operation can only be performed on an entire segment of the memory, assumed to be 64 Kbytes for the purposes of this disclosure. Therefore, when a single bit must be changed from a zero to a one, every location in the entire segment is changed from its current state to a one.
An additional requirement is that the device must be extremely tolerant of power failures. Hand held devices often experience sudden power outages, when batteries are exhausted, changed, or knocked loose, or when an external power source is suddenly removed. Thus, a memory management scheme for a hand held device must not only be able to coordinate the usage and erasure of memory segments, but it must not lose track of the memory management tasks when power is removed at an inopportune time.
Existing memory management methods and systems are not tolerant of power failures, but either rely on the power remaining on until the memory management tasks complete, or on a backup power source. Relying on luck to maintain power during the memory management is acceptable in some applications in which the power rarely is interrupted or the data can quickly by recovered or reloaded. Devices used in applications in which loss of data is unacceptable use some sort of backup power supply, such as a lithium battery, that is only used to maintain the contents of the memory and is unlikely to be inadvertently removed or knocked loose. The backup power supply increases the cost of the device. What is needed is a memory management method and system that will efficiently manage non-volatile memory without information loss during power failures.
SUMMARY OF THE INVENTION
Objects and advantages will be obvious, and will in part appear hereinafter and will be accomplished by the present invention which provides a method and system for memory management that is resistant to errors caused by power failures. One embodiment of the claimed invention provides a method of managing memory usage. According to the method, the memory is organized in at least two segments, each segment comprising at least two pages. The method comprises the steps of: determining a sequence of memory pages, checking each page of memory in sequence to determine if the information in the memory page is valid, detecting a first invalid memory page in a first segment, copying valid memory pages from said first segment to a swap segment, erasing said first segment, copying said swap segment to said first segment, erasing said swap segment, and continuing with said checking step until all segments have been checked.
According to another embodiment, a memory management system is provided. The memory management system is comprised of a memory and three memory status registers. The memory has at least two segments, each of the two segments having at least two pages. The three memory status registers include a first and third non-volatile memory status register. Each of the three memory status registers has a memory location for storing the status of each page of the memory. The status indicating at least whether the corresponding page of memory contains valid information, invalid information, or no information. The first and third memory status registers capable of being designated a current memory status register. The memory management system copies the current memory status register to a second of the three memory statue registers and updates the status of the memory pages in the second memory status register as the memory is compressed. The second memory status register is periodically copied to a non-volatile memory status register which then becomes the current memory status register such that upon interruption of power, the memory management system is able to maintain the integrity of said memory.
The disclosed invention advantageously provides a very low-cost method and system for ensuring data will not be lost in spite of power outages. The non-volatile memory retains the valid data while the non-volatile memory status registers track what data is current and provide a fail-safe means of moving data between pages of the non-volatile memory that will not lose track of the valid data.
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Bonneau Raymond J.
Lu Xiaodan Hu
Powers John P.
Brady III Wade James
Brill Charles A.
Peugh Brian R.
Sparks Donald
Telecky , Jr. Frederick J.
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