Computer graphics processing and selective visual display system – Display driving control circuitry – Display power source
Reexamination Certificate
1998-05-18
2001-08-14
Shalwala, Bipin (Department: 2673)
Computer graphics processing and selective visual display system
Display driving control circuitry
Display power source
C345S210000, C345S212000, C348S123000, 36
Reexamination Certificate
active
06275221
ABSTRACT:
CLAIM OF PRIORITY
This application makes reference to, incorporates the same herein, and claims all benefits accruing under 35 U.S.C. §119 from an application entitled Low Consumption Power Circuit Using Electronic Switch In Display Monitor earlier filed in the Korean Industrial Property Office on May 16, 1997, and there duly assigned Serial No. 97-10792 by that Office.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a low consumption power circuit using an electronic switch in a display monitor and, more particularly, to a low consumption power circuit using an electronic switch, which remarkably saves power consumed by a display monitor.
2. Discussion of Related Art
There have been efforts for reducing power consumed by electric and electronic products, to decrease the consumption of electric energy generated using the oil and atomic power and for reducing environmental pollution. Among these electric and electronic products, a display device, a peripherical device of a computer system, uses high voltage so that lots of efforts have been made to reduce its power consumption.
Generally, a display device comprises control means for saving consumption power. In one approach, the control means maybe implemented by a Display Power Management System (DPMS) mode, proposed by Video Electronics Standard Association (VESA) in U.S.A.
The DPMS mode functions to manage power of a display device, which is one of the peripheral devices of a computer, according to a used state of the computer to save the power.
In conformity with the VESA, the computer selectively supplies or blocks horizontal and vertical synchronous signals to the display device according to its used state, and the display device manages power according to the presence of the horizontal and vertical synchronous signals from the computer.
The power management states are classified into an on state, a stand-by state, a suspend state and a power off state. Both the horizontal and vertical synchronous signals are applied at the on state, and only the vertical synchronous signal is applied at the stand-by state. Only the horizontal synchronous signal is applied at the suspend state, and either the horizontal or vertical synchronous signal is not applied at the power off state.
The power management state is sequentially changed to the on state stand-by state suspend state power off state with the continuous lapse of unused time of the computer. It is commonly prescribed that consumption power of the display device be about 80 W at the on state, 65 W or less at the stand-by state, 25 W or less at the suspend state and 5 W or less at the power off state.
SUMMARY OF THE INVENTION
Accordingly, the present invention is directed to a low consumption power circuit using an electronic switch in a display monitor that substantially obviates one or more of the problems due to limitations and disadvantages of the related art.
An object of the present invention is to provide a low consumption power circuit using an electronic switch in a display monitor, which reduces power consumed by the display monitor using an electronic switch when the display monitor is not used for a specific period of time.
To accomplish the object of the present invention, there is provided a low consumption power circuit using an electronic switch in a display monitor, including an electronic switch circuit for selecting power saving mode as a power mode of the display monitor, a microcomputer for generating power off signal according to a switch signal output from the electronic switch circuit, and a main power controller for cutting off DC voltage output from a main power stage when the power off signal is applied from the microcomputer.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the invention as claimed.
REFERENCES:
patent: 5481299 (1996-01-01), Coffey et al.
patent: 5675364 (1997-10-01), Stedman et al.
patent: 5764547 (1998-06-01), Bilich et al.
patent: 5808693 (1998-09-01), Yamashita et al.
patent: 5880719 (1999-03-01), Kikinis
patent: 5917479 (1999-06-01), Haapakoski
patent: 5926173 (1999-07-01), Moon
patent: 6005559 (1999-12-01), Miyamoto
Bushnell , Esq. Robert E.
Kovalick Vincent E.
Samsung Electronics Co,. Ltd.
Shalwala Bipin
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