Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum
Patent
1998-11-23
2000-08-08
Clark, Sheila V.
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Of specified material other than unalloyed aluminum
257522, 438622, H01L 2900
Patent
active
061005908
ABSTRACT:
A low capacitance multilevel metal interconnect structure for use in integrated circuits that provides for increased IC device speed and that includes a plurality of patterned metal layers separated and supported by an interconnect dielectric material. The low capacitance multilevel metal interconnect structure has interconnect structure related capacitance lowering gaps in the interconnect dielectric material with the gaps, adjoining at least one of the patterned metal layers. While the gaps adjoin at least the uppermost patterned metal layer, they can also extend downward through the interconnect dielectric material such that they also adjoin one or more patterned metal layers that underlie the uppermost patterned metal layer. A process for the manufacture of the low capacitance multilevel metal interconnect structure includes a step of removing interconnect dielectric material from a conventional multilevel metal interconnect structure to form gaps adjoining at least one of the patterned metal layers. The gaps are formed without removing a substantial amount of interconnect dielectric material from directly underneath any patterned metal layer. This removal can be accomplished with an anisotropic etch and the gaps can be filled with air.
REFERENCES:
patent: 3890636 (1975-06-01), Harada et al.
patent: 5449953 (1995-09-01), Nathanson et al.
patent: 5548159 (1996-08-01), Jeng
Lin Hengyang (James)
Weaver Kevin
Yegnashankaran Visvamohan
Clark Sheila V.
National Semiconductor Corporation
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