Low capacitance and low V.sub.t annular MOSFET design for phase

Details Low capacitance and low V.sub.t annular MOSFET design for phase Low capacitance and low V.sub.t annular MOSFET design for phase

1996-10-28

1997-09-16

Mintel, William

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257401, 257412, 257413, 257488, H01L 2358

Patent

active

056683928

ABSTRACT:
Low capacitance, low threshold voltage annular MOSFET transistors are disclosed. Both low junction capacitance and low threshold voltage are achieved without degradation of drain current due to application of back-bias to the substrate upon which the transistor is formed. A polysilicon annulus, rather than the drain region, abuts field oxide regions, thereby preventing junction capacitance at interface of field oxide and drain (or source). Annular MOSFETs can be fabricated using conventional CMOS processing technology.

REFERENCES:
patent: 3821776 (1974-06-01), Hayashi et al.
patent: 4288806 (1981-09-01), Ronen
patent: 5200637 (1993-04-01), Matsuo et al.

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