Look-up table based logic macro-cells

Details Look-up table based logic macro-cells Look-up table based logic macro-cells

2006-03-28

2006-03-28

Le, Don (Department: 2819)

Electronic digital logic circuitry

Multifunctional or programmable

Having details of setting or programming of interconnections...

C326S041000

Reexamination Certificate

active

07019557

ABSTRACT:
A programmable look up table (LUT) circuit for an integrated circuit, comprising: one or more secondary inputs; and one or more configurable logic states; and two or more LUT values; and a programmable means to select a LUT value from a secondary input or a configurable logic state.A programmable macro look up table (macro-LUT) circuit for an integrated circuit, comprising: a plurality of LUT circuits, each of said LUT circuits comprising a LUT output, at least one LUT input, and at least two LUT values; and a programmable means of selecting LUT inputs to at least one of said LUT circuits from one or more other LUT circuit outputs and external inputs, and selecting LUT values to at least one of said LUT circuits from one or more other LUT circuit outputs and configurable logic states, said programmable means further comprised of two selectable manufacturing configurations, wherein: in a first selectable configuration, a random access memory circuit (RAM) is formed, said memory circuit further comprising configurable thin-film memory elements; in a second selectable configuration, a hard-wire read only memory circuit (ROM) is formed in lieu of said RAM, said ROM duplicating one RAM pattern in the first selectable option.

REFERENCES:
patent: 4706216 (1987-11-01), Carter
patent: 4870302 (1989-09-01), Freeman
patent: 4873459 (1989-10-01), El Gamal et al.
patent: 5343406 (1994-08-01), Freeman et al.
patent: 5488316 (1996-01-01), Freeman et al.
patent: 5844422 (1998-12-01), Trimberger et al.
patent: 5926036 (1999-07-01), Cliff et al.
patent: 6134173 (2000-10-01), Cliff et al.
patent: 6208163 (2001-03-01), Wittig et al.
patent: 6275065 (2001-08-01), Mendel
patent: 6331789 (2001-12-01), Or-Bach
patent: 6448808 (2002-09-01), Young et al.
patent: 6515511 (2003-02-01), Sugibayashi et al.
patent: 6529040 (2003-03-01), Carberry et al.
patent: 6801052 (2004-10-01), Pugh et al.
patent: 6888373 (2005-05-01), Kaptanoglu et al.
patent: 2001/0003428 (2001-06-01), Or-Bach
patent: 2001/0048320 (2001-12-01), Lee et al.
patent: 2002/0186044 (2002-12-01), Agrawal et al.
patent: 2003/0001615 (2003-01-01), Sueyoshi et al.
patent: 2003/0085733 (2003-05-01), Pugh et al.
patent: 2003/0206036 (2003-11-01), Or-Bach
patent: 2003/0210073 (2003-11-01), Ngai et al.
Seals & Whapshott, “Programmable Logic—PLDs and FPGAs”, 1997, pp 102-117, McGraw-Hill, USA.
Ashok K. Sharma, “Programmable Logic Handbook—PLDs, CPLDs, & FPGAs”, 1998, pp 99-171, McGraw-Hill, USA.
E. Ahmed, J. Rose, “The Effect of LUT and Cluster Size on Deep-Submicron FPGA Performance and Density”, FPGA 2000, Monterey, CA, 2000.

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