Look ahead LRU array update scheme to minimize clobber in...

Details Look ahead LRU array update scheme to minimize clobber in... Look ahead LRU array update scheme to minimize clobber in...

2006-12-26

2006-12-26

Elmore, Stephen C. (Department: 2185)

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

C711S118000, C711S133000, C711S140000, C711S159000, C712S227000, C712S231000, C712S233000

Reexamination Certificate

active

07155574

ABSTRACT:
A high-speed memory management technique that minimizes clobber in sequentially accessed memory, including but not limited to, for example, a trace cache. The method includes selecting a victim set from a sequentially accessed memory; selecting a victim way for the selected victim set; reading a next way pointer from a trace line of a trace currently stored in the selected victim way, if the selected victim way has the next way pointer; and writing a next line of the new trace into the selected victim way over the trace line of the currently stored trace. The method also includes forcing a replacement algorithm of next set to select a victim way of the next set using the next way pointer, if the trace line of the currently stored trace is not an active trace tail line.

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Black et al., “The Block-based Trace Cache,” pp. 196-207, IEEE, May 4, 1999.
Rotenberg et al., “Trace Cache: a Low Latency Approach to High Bandwidth Instruction Fetching,” pp. 24-34, IEEE, Dec. 4, 1996.

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