Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
Patent
1994-02-15
1996-03-26
Westin, Edward P.
Electronic digital logic circuitry
Signal sensitivity or transmission integrity
Bus or line termination
326 49, H03H 1128
Patent
active
055024009
ABSTRACT:
Electrical characteristics of the inputs to VLSI semiconductor chips can be modified after the chips are fabricated and mounted into multichip modules (packages), at which time the required characteristics are known accurately. The changes are accomplished by incorporating special circuitry at the chip inputs during their design combined with the use of `boundary-scan` type circuitry that has recently been put in place for device testing. The circuitry allows the impedance characteristics of the chip's receiver to be modified to match that of the driving source and the wiring interconnections between the chip and source. The test circuitry is used to provide the logical signals to selectively switch the circuits to the proper configuration. This enables optimally designed interconnections between the input and output circuitry on the chips and thereby avoids the necessity for costly re-designs.
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IBM Journal of Search and Development, vol. 34, No. 2/3, Mar./May 1990, article entitled "Boundary-Scan Design Principles For Efficient LSSD ASIC Testing" by R. W. Bassett et al, pp. 339-354.
Livolsi Robert R.
Lynch Robert J.
Williams, II George A.
Wood Roy A.
Augspurger Lynn L.
Driscoll Benjamin D.
International Business Machines - Corporation
Westin Edward P.
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