Logical PCI bus

Details Logical PCI bus Logical PCI bus

2006-05-30

2006-05-30

Vo, Tim (Department: 2112)

Electrical computers and digital data processing systems: input/

Intrasystem connection

Bus interface architecture

C710S312000

Reexamination Certificate

active

07054978

ABSTRACT:
A method of and apparatus for improving the efficiency of a data processing system employing multiple busses operating at multiple data transfer rates. Each of the multiple physical busses has its own characteristics including maximum data transfer rate, parallel word width, etc. Two or more of these physical busses are combined into a single logical bus, wherein the single logical bus has characteristics resulting from the combination of physical busses. These characteristics can include greater parallel word widths, enhanced maximum data transfer rates, etc.

REFERENCES:
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patent: 5936953 (1999-08-01), Simmons
patent: 6047348 (2000-04-01), Lentz et al.
patent: 6192439 (2001-02-01), Grunewald et al.
patent: 6311245 (2001-10-01), Klein
patent: 6330630 (2001-12-01), Bell
patent: 6393500 (2002-05-01), Thekkath

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