Logical cache memory storing logical and physical address inform

Electrical computers and digital processing systems: memory – Address formation – Address mapping

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Details

711202, 711205, 711206, 711207, 711118, 711128, 711119, 711141, 711147, G06F 1210

Patent

active

061382264

ABSTRACT:
Physical page information PA(a) corresponding to logical page information VA(a) as a cache tag address is retained in a logical cache memory 10 and in the event of a cache miss when a shared area is accessed, the physical page information PA (a) retained in the cache memory is compared with physical page information PA (b) resulting from the translation of a search address by TLB. When the result of the comparison is proved to be conformity, the cache entry is processes as a cache hit, so that the problem of a synonym arising from a case where the same physical address is assigned to different logical addresses is solved in such a manner that the number of times access is provided to TLB is halved as compared with the conventional arrangement.

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