Logical bus overlay for increasing the existing system bus...

Electrical computers and digital processing systems: support – Clock control of data processing system – component – or data...

Reexamination Certificate

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C713S500000

Reexamination Certificate

active

07051229

ABSTRACT:
A system and method for increasing the data rate of a system bus without making modifications to existing (legacy) devices connected to the bus. A logical bus is overlaid onto one or more physical buses in a TDM manner. The overlaying is done by transmitting data into the one or more existing buses during a previously unused phase of the bus clock having no effect on existing devices connected to the buses. The additional devices are capable of latching data on either phase bus clock.

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