Logic semiconductor integrated circuit device having embedded dy

Details Logic semiconductor integrated circuit device having embedded dy Logic semiconductor integrated circuit device having embedded dy

1998-05-19

1999-10-26

Nelms, David

Static information storage and retrieval

Read/write circuit

Data refresh

G11C 700

Patent

active

059739762

ABSTRACT:
In a logic semiconductor integrated circuit, a memory-cell array having memory cells MC, word lines WL, pairs of bit lines BL and /BL, sense amplifiers SA-N and SA-P and gates TG are located in a DRAM forming area of a semiconductor substrate. A refresh counter is located in a logic forming area of the semiconductor substrate. The refresh counter is used for generating a refresh-time word-line select signal for selecting one of the word lines WL when the memory cells MC are refreshed. Input/output buffers for inputting and outputting data transmitted through input/output lines are also located in the logic forming area of the semiconductor substrate. In addition, logic circuits such as inverters, AND gates, OR gates, NAND gates, NOR gates and flip-flops are located in the logic forming area of the semiconductor substrate as well. A logic semiconductor integrated circuit device having an embedded DRAM with a high degree of freedom in laying out components is provided by the invention.

REFERENCES:
patent: 5668774 (1997-09-01), Furutani
patent: 5740119 (1998-04-01), Asakura et al.
patent: 5822257 (1998-10-01), Ogawa
patent: 5867439 (1999-02-01), Asakura et al.

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