Electronic digital logic circuitry – Clocking or synchronizing of logic stages or gates
Reexamination Certificate
2006-08-22
2009-02-17
Tan, Vibol (Department: 2819)
Electronic digital logic circuitry
Clocking or synchronizing of logic stages or gates
C326S095000, C326S098000, C327S201000, C327S203000
Reexamination Certificate
active
07492192
ABSTRACT:
A logic processing circuit including a plurality of flip-flop including a front stage flip-flop and a rear stage flip-flop, a logic gate circuit network adapted to process data stored in the front stage flip-flop, a result of the process being stored in the rear stage flip-flop, and switching means for switching between a power-on period and a power-off period, the power-on period being a period in which power is being provided to the logic gate circuit network, the power-on period corresponding to either a low-level state period of a clock signal or a high-level state period thereof, the power-off period being a period in which the power is being turned off, the power-off period corresponding to the state period other than the state period corresponding to the power-on period.
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Olbon, Spivak, McClelland, Maier & Neustadt, P.C.
Sony Corporation
Tan Vibol
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