Logic module core cell for gate arrays

Details Logic module core cell for gate arrays Logic module core cell for gate arrays

1994-10-05

1996-02-13

Westin, Edward P.

Electronic digital logic circuitry

Multifunctional or programmable

Having details of setting or programming of interconnections...

326 39, 326 37, H03K 19173

Patent

active

054914310

ABSTRACT:
A logic module for use in gate arrays and the like includes five two input multiplexers 50, 52, 54, 56, 58. The module includes 10 data input terminals I1, I2, I3, I4, I5, I6, I7, I8, I9, I10. The first input terminals I1, I2 are connected to the data input terminals of multiplexer 50. Inputs I3, I4 and I5 are connected respectively to the select, the first data and second data inputs to multiplexer 52. Inputs I6, I7 are connected to the data inputs of multiplexer 54. Inputs I8, I9, I10 are connected to the first data, second data and select inputs to multiplexer 56. The output of multiplexer 52 is connected to the select input to multiplexers 50 and 54. The output of multiplexer 56 is connected to the select input to multiplexer 58 while the outputs of multiplexers 50 and 54 are respectively connected to the first and second data input to multiplexer 58. The output of multiplexer 58 comprises the logic circuit output O.

REFERENCES:
patent: 4825105 (1989-04-01), Hozle
patent: 4942318 (1990-06-01), Kawana
patent: 5198705 (1993-03-01), Galbraith
patent: 5280202 (1994-01-01), Chan et al.
patent: 5376829 (1994-12-01), Rogers

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