Logic-in-memory circuit using magnetoresistive element

Static information storage and retrieval – Systems using particular element – Magnetic thin film

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C365S158000

Reexamination Certificate

active

07054190

ABSTRACT:
A TMR network120using TMR elements as magnetoresistive elements is formed as a variable resistive element network by a series-parallel connection of two kinds of variable resistive elements R with resistance values that change according to an external input X or a memory input Y, as shown in an AND operation network122in FIG.5(b), wherein the total resistance value Rtotalis minimized, that is, the current I is maximized for a particular combination of the inputs. Assuming Rxiand Ryi(i=0, 1 and 2) as the resistance values of the variable resistive elements R according, respectively, to the external input X and memory input Y, the values of x and y determine the current I that flows through the network as shown in FIG.5(d). Setting a threshold value between I0and I1using a threshold detector160makes it possible to realize AND operation. The operation result is then output as a voltage value through an IV converter170.

REFERENCES:
patent: 5640343 (1997-06-01), Gallagher et al.
patent: 6538921 (2003-03-01), Daughton et al.
patent: 6777730 (2004-08-01), Daughton et al.
“Computational RAM: Implementing Processors in Memory” Elliott et al.,IEEE Design&Test of Computers, 1999, pp. 32-41.
“Proposal for Four-Valued MRAM Based on MTJ/RTD Structure” Uemura et al., Proceedings of the 33rd International Symposium on Multiple-Valued Logic, 2003, pp. 1-6.
“Ferroelectric-Based Functional Pass-Gate for Fine-Grain Pipe lined VLSI Computation”, Hanyu et al., IEEE Int. Solid-State Circuits Conference, Feb. 2002, pp. 208-290, 460.
“Complementary Ferroelectric-Capacitor Logic for Low-Power Logic-in-Memory VLSI”, Kimura et al., IEEE Int. Solid-State Circuits Conference, Feb. 2003, pp. 160, 485.
“High-Performance MRAM Technology wiht an Improved Magnetic Tunnel Junction Material”, Motoyoshi et al., IEEE Symp. on VLSI Technology Dig. Tech, 2002, pp. 212-213.
“Logic-in-Memory VLSI Using Non-Volatile Devices”, Kimura et al., Technical Report of IEICE ICD, pp. 1-5.
“Emerging Memories—Technologies and Trends”, Kluwer Academic Publishers, 2002, pp. 69-72.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Logic-in-memory circuit using magnetoresistive element does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Logic-in-memory circuit using magnetoresistive element, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Logic-in-memory circuit using magnetoresistive element will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3583324

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.