Logic gate with a reduced number of switches, especially for...

Electronic digital logic circuitry – Function of and – or – nand – nor – or not – Field-effect transistor

Reexamination Certificate

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C326S121000

Reexamination Certificate

active

07994824

ABSTRACT:
Logic Gate (100), particularly for integrated circuits including a Boolean network (105) having at least an input (106) and having at least an output node (107) and at least a terminal (108) connected to a first node at fixed potential (109) corresponding to a first logical level of the gate. The gate is characterized by the fact that the output node (107) is connected to a first pair of switches including a first switch (101) and a second switch (102), which are activated alternately, and are connected respectively, by a respective terminal, to the first node (109) at fixed potential and to the output node (107). Between the two switches there is a second pair of switches (103, 104) connected to a second node at fixed potential (110) corresponding to a second logical level of the gate. The switches of the second pair of switches are connected together in a way that the turning on of one switch of the second pair involves the turning off of the other switch of the second pair and the turning on of one of the switches of the second pair is suitable to bring the output node (107) to the potential of the second node at fixed potential (110).

REFERENCES:
patent: 4595845 (1986-06-01), Briggs
patent: 4896057 (1990-01-01), Yang et al.
patent: 5701094 (1997-12-01), Sridhar et al.
patent: 6603333 (2003-08-01), Vinh et al.
patent: 6624665 (2003-09-01), Kim et al.
patent: 7592841 (2009-09-01), Kapoor

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