Logic gate circuit and parallel bit test circuit for semiconduct

Details Logic gate circuit and parallel bit test circuit for semiconduct Logic gate circuit and parallel bit test circuit for semiconduct

1995-04-21

1997-07-08

Nelms, David C.

Static information storage and retrieval

Read/write circuit

Flip-flop used for sensing

365175, 365179, 36518906, 36518911, 326 51, 326 89, G11C 700

Patent

active

056468970

ABSTRACT:
A logic circuit is provided for a memory device which can be operated at a high speed with a lower voltage power source level than conventional devices. This logic circuit can be used in a multi-bit test circuit executing the wired-OR-logic operation of complementary logic signals from a plurality of pre-sense amplifiers, receiving the output of the wired-OR-logic operation by an emitter follower using a bipolar transistor, and outputting an AND signal of the complementary logic signals by a level comparing circuit. A sense amplifier is also provided for executing the wired-OR-logic operation of complementary logic signals from a plurality of pre-sense amplifiers, raising the level of the output of the wired-OR-logic operation by a level shift circuit having a semiconductor element for applying an inverse bias potential to an input signal, executing the wired-OR-operation of the shifted up output and outputs from other blocks, and receiving and amplifying the output of the wired-OR-logic operation.

REFERENCES:
patent: 5402011 (1995-03-01), Aoki
"7ns 4Mb BICMOS SRAM with Parallel Testing Circuit" by Y. Okajima et al. 1991 IEEE International Solid State Circuits Conference.
Ronald J. Tocci: Digital System, Principle and Applications, pp. 403-404 and 438-440, Prentice Hall 1988.

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