Logic driven level shifter

Details Logic driven level shifter Logic driven level shifter

1996-12-24

1999-07-06

Santamauro, Jon

Electronic digital logic circuitry

Interface

Logic level shifting

326 83, H03K 190185

Patent

active

059202033

ABSTRACT:
An improved complementary logic driven level shifter which typically improves switching speed over the prior art diode-type circuit, and allows for symmetrical delays for both high-to-low and low-to-high transitions, thus reducing settling times. The complementary CMOS and not-CMOS inputs to the level shifter are applied to the gates of a pair of P-channel FETs and also to the gates of a pair of N-channel FETs. The sources of the P-channel FETs are coupled to a current source. The drain of each P-channel FET is coupled to the drain of the N-channel FET to which its gate is coupled, and also to the anode of a diode. The cathodes of the two diodes, and the sources of the N-channel FETs are coupled together to the anode of a grounded cathode diode. The output SELECT is the common connection point of the drains of the FETs whose gates are coupled to not-CMOS, and the complementary not-SELECT output is the drains of the FETs whose gates are coupled to CMOS. In a second embodiment, the two diodes across the N-channel FETs are replaced by a diode from the current source to the anode of the grounded-cathode diode.

REFERENCES:
patent: 4518926 (1985-05-01), Swanson
patent: 4724339 (1988-02-01), Ishida
patent: 4769564 (1988-09-01), Garde
patent: 4908530 (1990-03-01), Huang
patent: 4968904 (1990-11-01), Yamashita et al.
patent: 4973864 (1990-11-01), Nogami
patent: 5304870 (1994-04-01), Nagasawa
patent: 5450084 (1995-09-01), Mercer

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