Logic design development tool and method

Details Logic design development tool and method Logic design development tool and method

2005-03-31

2008-03-18

Chiang, Jack (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000, C716S030000, C716S030000, C716S030000

Reexamination Certificate

active

07346864

ABSTRACT:
A logic design development tool including a converting unit configured to convert a plurality of different circuit design languages into a common intermediate format, and an executing unit configured to execute the common intermediate format so as to perform a design simulation of a circuit defined by the circuit design languages.

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Printouts for Synopsys located at http://synopsys.com and www.synopsys.com/products.
Printout for Calypto Design Systems located at http://www.calypto.com.
Printout for Interra Systems located at http://www.interrasystems.com.
Printout for Verific Design Automation located at http://www.verific.com.

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