Logic circuit arrangement

Details Logic circuit arrangement Logic circuit arrangement

2007-04-03

2007-04-03

Tan, Vibol (Department: 2819)

Electronic digital logic circuitry

Clocking or synchronizing of logic stages or gates

Field-effect transistor

C326S104000, C326S106000

Reexamination Certificate

active

10996620

ABSTRACT:
A logic circuit arrangement including at least two data signal inputs, at which at least two data signals are provided, a first signal path coupled to the data signal inputs, and having a plurality of transistors of a first conduction type, and a plurality of control inputs coupled to the transistors.

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Wannemacher, M “Das FPGA-Kochbuch”, Abb. 6.4: SRAM-Zelle von XILINX, 1. Auflage, International Thomson Publishing Company, Bonn, 1998, p. 111, no date.
Wannemacher, M “Das FPGA-Kochbuch”, Abb. 7.36: Logikblock (CLB) der XC4000-Familien, 1. Auflage, International Thomson Publishing Company, Bonn, 1998, p. 197, no date.

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