Logic cell protected against random events

Details Logic cell protected against random events Logic cell protected against random events

2007-08-23

2009-06-02

Nguyen, Tuan T (Department: 2824)

Static information storage and retrieval

Systems using particular element

Flip-flop

C365S173000, C365S174000, C365S181000

Reexamination Certificate

active

07542333

ABSTRACT:
A memory cell stores information in the form of a first logic level and a second logic level that are complementary to each other. The memory cell includes a first storage circuit and a second storage circuit for storing the first logic level and the second logic level. The first and second storage circuits each have a respective input and output. An isolation circuit provides electrical isolation of the input of the first storage device from the output of the second storage device, except during access to the first and second storage circuits.

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