Pulse or digital communications – Synchronizers – Phase displacement – slip or jitter correction
Patent
1998-08-27
2000-06-27
Chin, Stephen
Pulse or digital communications
Synchronizers
Phase displacement, slip or jitter correction
375375, 375373, 375327, 329307, 329325, 329360, 327147, 327156, 370516, H03D 324, H03D 318, H03D 300, H03D 302, H03D 100
Patent
active
060815728
ABSTRACT:
Circuit and method for generating a signal for use in locking a second signal on a first signal. The first and second signals have an associated frequency. A first beat note signal and a second beat note signal are generated from the first and second signals, respectively, when the frequencies of the first and second signals are not equal. The circuit includes a first and second flip-flop and detector circuitry. The first flip-flop is configured to receive the first and second beat note signals for generating a first state signal. The first flip-flop generates the first state signal by sampling the second beat note signal at a first periodic interval of the first beat note signal. The second flip-flop is configured to receive the first and second beat note signals for generating a second state signal. The second flip-flop generates the second state signal by sampling the second beat note signal at a second periodic interval of the first beat note signal. The detector circuitry is coupled to receive the first and second state signals from the first and second flip-flops for detecting a polarity of the frequency difference between the first and second signals. The polarity of the frequency difference is defined in a tri-state having a positive state, a negative state, and a zero state.
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Chin Stephen
Maddox Michael W.
Maxim Integrated Products
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