Electrical computers and digital processing systems: memory – Storage accessing and control – Memory configuring
Reexamination Certificate
2011-08-23
2011-08-23
Nguyen, Hiep T (Department: 2188)
Electrical computers and digital processing systems: memory
Storage accessing and control
Memory configuring
Reexamination Certificate
active
08006064
ABSTRACT:
Methods, systems, and articles for receiving, by a lock-free vector of a computing device, a request from a thread of the computing device to write data to the lock-free vector are described herein. In various embodiments, the lock-free vector may then determine whether the lock-free vector is growing and, if the lock-free vector is not growing, may allocate a first portion of memory of the lock-free vector exclusively to the requesting thread. In some embodiments, the allocating may comprise allocating using a resource allocator of the lock-free vector.
REFERENCES:
patent: 7263592 (2007-08-01), Michael
Damian Dechev et al., Lock-free Dynamically Resizable Arrays, Texas A&M University College Station, 12 pages ; 2006.
Li Tianyou
Yang Jia
Zhang Qi
Intel Corporation
Nguyen Hiep T
Schwabe Williamson & Wyatt P.C.
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