Locally asynchronous, pipeline-able logic circuits for true-sing

Electronic digital logic circuitry – Clocking or synchronizing of logic stages or gates – Field-effect transistor

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Details

326 98, 326 46, 326115, H03K 19096, H03K 19094

Patent

active

058412980

ABSTRACT:
A pipeline-able asynchronous logic circuit is provided that implements a subfunction of a logic function that is distributed into multiple sequential subfunctions. Each subsequent subfunction is applied to a result of an immediately preceding subfunction of the sequence. The asynchronous logic circuit has an output node and a differential logic circuit connected to the output node via a first path. The differential logic circuit applies a particular subfunction to an inputted signal to produce a result signal. The asynchronous logic circuit also has a sense amplifier that is connected to the output node via a second path which is distinct from the first path. The sense amplifier, in response to being enabled, amplifies the result signal produced by the differential logic circuit. The sense amplifier outputs the amplified result signal onto the output node. The asynchronous logic circuit also has a pre-charge circuit which pre-charges the output node to a first voltage, but only when the sense amplifier is disabled. Furthermore, the asynchronous logic circuit has a first enable circuit which responds to receiving an enable signal by enabling the sense amplifier and outputting the enable signal only when the sense amplifier outputs the amplified result signal. The differential logic circuit drives the output node via the first path, and the sense amplifier drives the output node via the second path, to a voltage corresponding to the result signal.

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patent: 5023480 (1991-06-01), Gieseke et al.
patent: 5075578 (1991-12-01), Wendell
patent: 5216295 (1993-06-01), Hoang

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