Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2007-03-20
2007-03-20
Sparks, Donald (Department: 2187)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S133000, C711S134000, C711S135000, C711S141000, C711S142000, C711S143000
Reexamination Certificate
active
10422677
ABSTRACT:
A microprocessor and a related compiler support a local cache block flush instruction in which an execution unit of a processor determines an effective address. The processor forces all pending references to a cache block corresponding to the determined effective address to commit to the cache subsystem. If the referenced cache line is modified in the local cache (the cache subsystem corresponding to the processor executing the instruction), it is then written back to main memory. If the referenced block is valid in the local cache it is invalidated, but only in the local cache. If the referenced block is not valid in the local cache, there is no invalidation. Remote processors receiving a local cache block flush instruction from another processor via the system ignore the instruction.
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McCalpin John David
Sinharoy Balaram
Williams Dereck Edward
Wright Kenneth Lee
England Anthony V. S.
International Business Machines Corp.
Lally Joseph P.
Salys Casimer K.
Sparks Donald
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